Modulators are used extensively in the wireless communications industry. Using a typical modulator, an input baseband signal is modulated, amplified, and transmitted as a radio frequency (RF) signal. To generate the RF signal according to quadrature modulation, an input signal is first processed by a baseband processor to generate an in-phase (I) signal component and a quadrature (Q) signal component. The I and Q (I/Q) signal components are processed and mixed to form the RF signal.
An RF signal can also be generated using polar modulation, where the analog I/Q signal is converted to an amplitude modulation (AM) signal component and a phase modulation (PM) signal component. In a polar modulator, the AM signal and the PM signal are processed separately before being combined to create the desired signal.
There are several conventional modulator architectures, for example a super-heterodyne quadrature modulator, a direct conversion quadrature modulator, a small signal polar modulator, a large signal polar modulator with closed-loop compensation, and a large signal polar modulator with open-loop compensation. Each modulator includes a final stage power amplifier (PA).
FIG. 1 illustrates the basic input port definitions of a conventional power amplifier. The power amplifier 26 includes three input ports configured to receive an input supply voltage, an input bias voltage, and an input RF signal. The power amplifier 26 includes an output port configured to output an output RF signal. The power amplifier 26 is also coupled to ground.
FIG. 2 illustrates a power amplifier configured to operate within a quadrature modulator. The power amplifier 27 processes the amplitude modulation through the input RF signal port. The input supply voltage and the input bias voltage are fixed.
FIG. 3 illustrates a conventional super-heterodyne quadrature modulator. The super-heterodyne quadrature modulator includes a mixer 2, a signal source 4, an intermediate frequency (IF) variable gain amplifier (VGA) 6, a bandpass filter (BPF) 8, a mixer 10, a signal source 12, a BPF 14, a RF VGA 16, a BPF 18, a linear final stage power amplifier 20, a duplexer 22, and an antenna 24. An input baseband signal is mixed to an intermediate frequency by the mixer 2. The IF signal output from the mixer 2 is passed through the VGA 6 and the BPF 8. The resulting signal is mixed to a RF signal by the mixer 10. The RF signal output from the mixer 10 is passed through the BPF 14, the VGA 16, and the BPF 18, and input to the final stage PA 20. The BPF 18 is typically a surface acoustic wave (SAW) filter. The amplified RF signal output from the final stage PA 20 is provided to the duplexer 22 and transmitted via the antenna 24. Any power level control is performed before the final stage PA 20. The super-heterodyne quadrature modulator requires complicated circuitry. Usually, the final stage PA 20 efficiency is poor especially with signals which have high Peak-to-Average Ratio (PAR). PA back-off is typically required to maintain an in-band signal quality and contain out-of-band spectral re-growth.
FIG. 4 illustrates a conventional direct conversion quadrature modulator. The difference between the super-heterodyne quadrature modulator of FIG. 3 and the direct conversion quadrature modulator of FIG. 4 is that the input baseband signal is mixed directly to an RF signal in the direct conversion quadrature modulator. The direct conversion quadrature modulator includes a mixer 30, a signal source 32, a VGA 34, a BPF 36, a VGA 38, a BPF 40, a linear power amplifier 42, a duplexer 44, and an antenna 46. An input baseband signal is mixed to an RF signal by the mixer 30. The RF signal output from the mixer 30 is passed through the VGA 34, the BPF 36, the VGA 38, and the BPF 40, and input to the final stage PA 42. The amplified RF signal output from the final stage PA 42 is provided to the interface circuit 44 and transmitted via the antenna 46. In this architecture, the input signal is converted to RF directly from baseband. The elimination of the IF stage, as compared with the super-heterodyne quadrature modulator, significantly reduces the circuit cost and power consumption. Similarly to the super-heterodyne quadrature modulator, the direct conversion quadrature modulator also suffers from poor PA efficiency. For signals with a large peak-to-average ratio, PA back-off is required to avoid signal quality degradation. This will further reduce the PA efficiency of the direct conversion quadrature modulator. However, for several applications, direct conversion quadrature modulator offers an effective compromise of performance for power consumption and circuit complexity.
FIG. 5 illustrates a power amplifier configured to operate within a polar modulator. The power amplifier 28 processes the amplitude modulation through the input supply voltage port. The input supply voltage is varied by the AM-to-AM compensation module. The amplitude modulation is input through the input RF signal port. The input bias voltage is fixed.
FIG. 6 illustrates a conventional small signal polar modulator. The small signal polar modulator includes a mixer 50, a signal source 52, an amplitude modulation (AM) detector 54, an AM and power controller 56, a translational loop 58, a preliminary stage amplifier 70, a linear final stage power amplifier 72, a duplexer 74, and an antenna 76. The translational loop 58 includes a limiter 60, a phase/frequency detector 62, a loop filter 64, a transmit voltage controlled oscillator (TxVCO) 66, and a mixer 68. The AM detector 54 and the AM and power controller 56 form an amplitude path, and the translational loop forms a phase path. The AM detector 54 and the limiter 60 convert I/Q signals to polar signals. An input baseband signal is mixed to an IF signal by the mixer 50. The IF signal output from the mixer 50 is direct to the AM detector 54 and the translational loop 58. The phase/frequency detector 62, the loop filter 64, the TxVCO 66, and the mixer 68 form a phase-locked loop. The output of the TxVCO 66 is a phase modulation (PM) signal, which is input to the preliminary stage amplifier 70. An AM signal output from the AM and power controller 56 is combined with the PM signal at the preliminary stage amplifier 70. Control of the preliminary stage amplifier 70 is provided by the AM and power controller 56. However, the output power of the preliminary stage amplifier 70 is not sufficient, thus requiring the final stage PA 72. An amplified RF signal is output from the preliminary stage amplifier 70 to the final stage PA 72. The amplified RF signal output from the final stage PA 72 is provided to the duplexer 74 and transmitted via the antenna 76.
In some configurations, the small signal polar modulator maintains the translational loop architecture while adding envelope modulation at the preliminary stage amplifier. In this configuration, full modulation exists before the final stage PA. Therefore, PA back-off is required to maintain good signal quality. As a result, the final stage PA efficiency is poor. Both open-loop and closed-loop compensation can be used to compensate for non-linearities introduced by the preliminary stage amplifier. Compared with a large signal polar modulator, discussed below, the compensation path within the small signal polar modulator is easier to implement. However, the small signal polar modulator does not reach the same level of PA efficiency achieved by a large signal polar modulator.
The transformation from the I/Q domain, baseband signals, to the polar domain is a bandwidth expansion process. Therefore, the small signal polar modulator suffers from the expanded bandwidth problem, which results in added circuit complexity and current consumption.
FIG. 7 illustrates a conventional large signal polar modulator with closed-loop compensation. The primary difference between the small signal polar modulator and the large signal polar modulator is that in the large signal polar modulator the AM signal from the amplitude path and the PM signal from the phase path are combined at the final stage PA. In the small signal polar modulator, the AM signal and the PM signal are combined at the preliminary stage amplifier prior to the final stage PA. The large signal polar modulator with closed-loop compensation includes a mixer 80, a signal source 82, an AM detector 84, an AM and power controller 86, a translational loop 88, a preliminary stage amplifier 100, a linear power amplifier 102, a coupler 104, a duplexer 106, and an antenna 108. The translational loop 88 includes a limiter 90, a phase/frequency detector 92, a loop filter 94, a TxVCO 96, and a mixer 98. The AM detector 84 and the AM and power controller 86 form the amplitude path, and the translational loop forms the phase path. An input baseband signal is mixed to an IF signal by the mixer 80. The IF signal output from the mixer 80 is directed to the AM detector 84 and the translational loop 88. The output of the TxVCO 96 is a phase modulation (PM) signal, which is input to the preliminary stage amplifier 100. The preliminary stage amplifier 100 outputs an amplified PM signal. An AM signal output from the AM and power controller 86 is combined with the amplified PM signal at the final stage PA 102. Power control of the final stage PA 102 is provided by the AM and power controller 86. An amplified RF signal is output from the final stage PA 102 to the coupler 104. The coupler 104 directs the amplified RF signal as feedback to the mixer 98 in the phase path and to the AM and power controller 86 in the amplitude path. The amplified RF signal output from the PA 102 is also provided from the coupler 104 to the duplexer 106 and transmitted via the antenna 108.
The large signal polar modulator with closed-loop compensation maintains the translational loop architecture while adding the envelope modulation at the final stage PA. The final stage PA is operated in the compressed region. Therefore, this architecture has the potential of improved PA efficiency compared with the quadrature modulators (FIGS. 3 and 4) and the small signal polar modulator (FIG. 6).
The large signal polar modulator with closed-loop compensation has been implemented for Global System for Mobile communication (GSM) and Enhanced Data rates for GSM Evolution (EDGE) applications. However, there are doubts about the possibilities of applying this architecture to wider bandwidth modulations and standards with large power control ranges. With large bandwidth signals, for example Universal Mobile Telecommunications System (UMTS), the original signal is about 5 MHz wide in the I/Q domain. When the I/Q signal is converted to the polar domain, the resulting AM and PM signals are close to 25 MHz wide. It is very difficult to implement the traditional translational loop to handle such a bandwidth while keeping the in-band noise low.
Power control for code division multiple access (CDMA) systems is very important. Most standards which use CDMA concepts have a very large power control range. It is questionable as to whether or not the large signal polar architecture with closed-loop feedback can be applied to CDMA standards with reasonable circuit complexity and current consumption.
FIG. 8 illustrates a conventional large signal polar modulator with open-loop compensation. The large signal polar modulator of FIG. 8 does not include a feedback compensation path. The large signal polar modulator with open-loop compensation includes a pre-distortion module 110, a mixer 120, a signal source 122, an AM and power controller 126, a translational loop 128, a preliminary stage amplifier 140, a power amplifier 142, a duplexer 144, and an antenna 146. The translational loop 128 includes a limiter 130, a phase/frequency detector 132, a loop filter 134, a TxVCO 136, and a mixer 138. The AM and power controller 126 forms the amplitude path, and the translational loop forms the phase path. An input baseband signal is pre-distorted by the pre-distortion module 110. A distorted baseband signal is output from the pre-distortion module 110 and is mixed to an IF signal by the mixer 120. The IF signal output from the mixer 120 is directed to the translational loop 128. The phase/frequency detector 132, the loop filter 134, the TxVCO 136, and the mixer 138 form a phase-locked loop. The output of the TxVCO 136 is a phase modulation (PM) signal, which is input to the preliminary stage amplifier 140. The preliminary stage amplifier 140 outputs an amplified PM signal. An AM signal output from the AM and power controller 126 is combined with the amplified PM signal at the final stage PA 142. Control of the PA 142 is provided by the AM and power controller 126. An amplified RF signal is output from the final stage PA 142 to the duplexer 144 and transmitted via the antenna 146.
The large signal polar modulator with open-loop compensation also maintains the translational loop architecture, and imposes envelope modulation at the final stage PA. The final stage PA is operated as a switch, and therefore, with the potential of improved PA efficiency. Therefore, open-loop compensation is feasible as long as the saturated PA behaves very consistently over temperature variation and aging and the PA is properly pre-calibrated at the assembly line.
The bandwidth expansion process associated with converting signals from the I/Q domain to the polar domain is a concern related to polar implementations. This imposes significant design challenges to expand polar architectures to much higher data rate transmission standards, for example 802.11× or WiMAX. This is a common concern for all polar implementations.
By using the translational loop architecture in the polar implementations, the transmit VCO (TxVCO) is in the modulation path of the PM signals. This poses significant design challenges to the TxVCO design. Compared with a quadrature implementation, VCOs included in a quadrature implementation are only used as an element for mixing the signal to higher frequencies. As a result, the VCO designs in quadrature modulators are more independent from modulation to modulation.
Another common concern for polar implementation is an AM signal-to-PM signal alignment problem. In many allocations, the AM signal from the AM modulation path and the PM signal from the PM modulation path are recombined with sub-nanosecond resolution. The analog components on the AM and PM modulation paths are not as stable as digital components and are subject to temperature variation and aging. As data rate modulations continue to increase, the mis-alignment tolerance between AM and PM modulation paths will be further reduced.
GSM is widely deployed throughout the world. However, GSM is optimized for voice only. Other applications require higher data rates, thereby necessitating the ability to transmit and receive the data using other techniques, for example, EDGE, CDMA2000, UMTS, 802.11x, and Worldwide Interoperability for Microwave Access (WiMAX). To accommodate multiple techniques, or standards, within one device, a multiple-mode modulator is required. Incorporating multiple modes into one device utilizes the current infrastructure while obtaining higher data rates for advanced services.
As GSM transmitters have evolved, the translational loop has become the dominant architecture for the implementation of GSM phones. The translational loop has the advantage of using a low-pass filter (loop filter) to perform the bandpass filtering. In addition, the constant envelope characteristics of the GSM signals allow the power amplifiers (PAs) to be operated deep into the compressed region, which results in better PA efficiency.
GSM is highly optimized for voice applications and carries no information on its amplitude path. With the increasing demand for higher data rates, which provides for more feature rich applications, GSM can no longer fulfill the needs of mobile device users. The evolution of GSM to General Packet Radio Service (GPRS), EDGE to Enhanced GPRS (EGPRS), and finally, to UMTS illustrates proof of such demand.
Successful transition to newer technologies from older technologies requires seamless integration with no interruption to the current users. Multiple-mode modulators are backwards compatible with the older standards to take full advantage of the large existing implementations and past investments, while having the ability to access the latest networks for more advanced features. There is therefore a continuing need for multiple-mode modulators.